SH7211 Datasheet, PDF (965/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 21 Flash Memory
21.6.2 Software Protection
Software protection is set up in any of two ways: by disabling the downloading of on-chip
programs for programming and erasing, and by means of a key code.
Table 21.9 Software Protection
Item
Protection by the
SCO bit
Protection by FKEY
Function to be Protected
Description
Download
Programming/
Erasure
Clearing the SCO bit in FCCS disables √
√
downloading of the programming/erasing
program, thus making the LSI enter a
programming/erasing-protected state.
Downloading and programming/erasing √
√
are disabled unless the required key code
is written in FKEY. Different key codes are
used for downloading and for
programming/erasing.
21.6.3 Error Protection
Error protection is a mechanism for aborting programming or erasure when an error occurs, in the
form of the microcontroller getting out of control during programming/erasing of the flash
memory or operations that are not in accordance with the established procedures for
programming/erasing. Aborting programming or erasure in such cases prevents damage to the
flash memory due to excessive programming or erasing.
If the microcontroller malfunctions during programming/erasing of the flash memory, the FLER
bit in FCCS is set to 1 and the LSI enters the error protection state, thus aborting programming or
erasure.
Rev. 2.00 May. 08, 2008 Page 941 of 1200
REJ09B0344-0200