SH7211 Datasheet, PDF (546/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
10.4.10 MTU2–MTU2S Synchronous Operation
(1) MTU2–MTU2S Synchronous Counter Start
The counters in the MTU2 and MTU2S which operate at different clock systems can be started
synchronously by making the TCSYSTR settings in the MTU2.
(a) Example of MTU2–MTU2S Synchronous Counter Start Setting Procedure
Figure 10.83 shows an example of synchronous counter start setting procedure.
MTU2-MTU2S synchronous
counter start
Stop count operation
[1]
Set the necessary operation [2]
Set TCSYSTR
[3]
<Counter operation starts>
[1] Use TSTR registers in the MTU2 and MTU2S and halt the
counters used for synchronous start operation.
[2] Specify necessary operation with appropriate registers such as
TCR and TMDR.
[3] In TCSYSTR in the MTU2, set the bits corresponding to the
counters to be started synchronously to 1. The TSTRs are
automatically set appropriately and the counters start
synchronously.
Notes: 1. Even if a bit in TCSYSTR corresponding to an operating
counter is cleared to 0, the counter will not stop. To stop
the counter, clear the corresponding bit in TSTR to 0
directly.
2. To start channels 3 and 4 in reset-synchronized PWM
mode or complementary PWM mode, make appropriate
settings in TCYSTR according to the TSTR setting for
the respective mode. For details, refer to section 10.4.7,
Reset-Synchronized PWM Mode, and section 10.4.8,
Complementary PWM Mode.
Figure 10.83 Example of Synchronous Counter Start Setting Procedure
Rev. 2.00 May. 08, 2008 Page 522 of 1200
REJ09B0344-0200