SH7211 Datasheet, PDF (287/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 8 Bus State Controller (BSC)
CK
A25 to A0
A12/A11*¹
CS3
RASL
CASL
RD/WR
DQMxx
D15 to D0
BS
DACKn*²
Tnop Tc1
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 8.23 Single Write Timing (Bank Active, Same Row Addresses in the Same Bank)
Rev. 2.00 May. 08, 2008 Page 263 of 1200
REJ09B0344-0200