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| SH7211 Datasheet, PDF (292/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family | |||
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Section 8 Bus State Controller (BSC)
Tp
Tpw
Trr
CK
Trc
Trc
Trc
CKE
A25 to A0
A12/A11*1
CSn
RASL
CASL
RD/WR
DQMxx
D15 to D0
Hi-z
BS
DACKn*2
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 8.26 Self-Refresh Timing
Rev. 2.00 May. 08, 2008 Page 268 of 1200
REJ09B0344-0200
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