SH7211 Datasheet, PDF (638/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 12 Port Output Enable 2 (POE2)
Initial
Bit Bit Name Value R/W Description
14
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
13
POE1F 0
R/(W)*¹ POE1 Flag
Indicates that a high impedance request has been input
to the POE1 pin.
[Clearing conditions]
• By writing 0 to POE1F after reading POE1F = 1
(when the falling edge is selected by bits 3 and 2 in
ICSR1)
• By writing 0 to POE1F after reading POE1F = 1 after
a high level input to POE1 is sampled at Pφ/8, Pφ/16,
or Pφ/128 clock (when low-level sampling is selected
by bits 3 and 2 in ICSR1)
[Setting condition]
• When the input set by bits 3 and 2 in ICSR1 occurs at
the POE1 pin
Rev. 2.00 May. 08, 2008 Page 614 of 1200
REJ09B0344-0200