SH7211 Datasheet, PDF (548/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
MTU2 clock
MTU2S clock
TCSYSTR
H'00
H'51
Automatically cleared after
TCSYSTR setting is made
H'00
MTU2/TSTR
H'00
H'42
MTU2S/TSTR
H'00
H'80
MTU2/TCNT_1
MTU2S/TCNT_4
H'0000
H'0000
H'0001
H'0002
H'0002
H'0004
H'0001
H'0003
Figure 10.84 (2) Example of Synchronous Counter Start Operation (MTU2-to-MTU2S
Clock Frequency Ratio = 1:2)
MTU2 clock
MTU2S clock
TCSYSTR
H'00
H'51
Automatically cleared after
TCSYSTR setting is made
H'00
MTU2/TSTR
H'00
H'42
MTU2S/TSTR
H'00
H'80
MTU2/TCNT_1
MTU2S/TCNT_4
H'0000
H'0000
H'0001
H'0002 H'0004
H'0002
H'0001 H'0003
Figure 10.84 (3) Example of Synchronous Counter Start Operation (MTU2-to-MTU2S
Clock Frequency Ratio = 1:3)
Rev. 2.00 May. 08, 2008 Page 524 of 1200
REJ09B0344-0200