SH7211 Datasheet, PDF (1202/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Item
26.2 Register Bits
Page
1051
Revision (See Manual for Details)
Table amended
Module
Name
DMAC
Register
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Abbreviation 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
DMATCR_7
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
CHCR_7
RSAR_7
TC
⎯
⎯
⎯
DM[1:0]
⎯
⎯
⎯
RLD
⎯
⎯
⎯
HE
SM[1:0]
TB
TS[1:0]
⎯
⎯
⎯
HIE
⎯
⎯
RS[3:0]
IE
TE
DE
RDAR_7
RDMATCR_7
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
1061
Table amended
Module
Name
ADC
Register
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Bit
Abbreviation 31/23/15/7 30/22/14/6 29/21/13/5 28/20/12/4 27/19/11/3 26/18/10/2 25/17/9/1 24/16/8/0
ADDR0
⎯
⎯
⎯
⎯
ADD0[11:8]
ADD0[7:0]
ADDR1
⎯
⎯
⎯
⎯
ADD1[11:8]
ADD1[7:0]
ADDR2
⎯
⎯
⎯
⎯
ADD2[11:8]
ADD2[7:0]
ADDR3
⎯
⎯
⎯
⎯
ADD3[11:8]
ADD3[7:0]
ADDR4
⎯
⎯
⎯
⎯
ADD4[11:8]
ADD4[7:0]
ADDR5
⎯
⎯
⎯
⎯
ADD5[11:8]
ADD5[7:0]
ADDR6
⎯
⎯
⎯
⎯
ADD6[11:8]
ADD6[7:0]
ADDR7
⎯
⎯
⎯
⎯
ADD7[11:8]
ADD7[7:0]
Rev. 2.00 May. 08, 2008 Page 1178 of 1200
REJ09B0344-0200