SH7211 Datasheet, PDF (137/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 6 Interrupt Controller (INTC)
Bit
3 to 0
Bit Name
BN[3:0]
Initial
Value
0000
R/W Description
R
Bank Number
These bits indicate the bank number to which saving is
performed next. When an interrupt using register banks
is accepted, saving is performed to the register bank
indicated by these bits, and BN is incremented by 1.
After BN is decremented by 1 due to execution of a
RESBANK (restore from register bank) instruction,
restoration from the register bank is performed.
Rev. 2.00 May. 08, 2008 Page 113 of 1200
REJ09B0344-0200