SH7211 Datasheet, PDF (28/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 1 Overview
Items
Specification
Direct memory access • Eight channels; external request available for four of them
controller (DMAC)
• Can be activated by on-chip peripheral modules
• Burst mode and cycle steal mode
• Intermittent mode available (16 and 64 cycles supported)
• Transfer information can be automatically reloaded
Clock pulse
generator (CPG)
• Clock mode: Input clock can be selected from external input (EXTAL
or CK) or crystal resonator
• Input clock can be multiplied by 16 (max.) by the internal PLL circuit
• Five types of clocks generated:
⎯ CPU clock: Maximum 160 MHz
⎯ Bus clock: Maximum 40 MHz
⎯ Peripheral clock: Maximum 40 MHz
⎯ Timer clock: Maximum 80 MHz
⎯ AD clock: Maximum 40 MHz
Watchdog timer
(WDT)
• On-chip one-channel watchdog timer
• A counter overflow can reset the LSI
Power-down modes • Three power-down modes provided to reduce the current consumption
in this LSI
⎯ Sleep mode
⎯ Software standby mode
⎯ Module standby mode
Rev. 2.00 May. 08, 2008 Page 4 of 1200
REJ09B0344-0200