SH7211 Datasheet, PDF (1219/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Initial values of system registers............... 19
Initiation intervals
of user branch processing ....................... 947
Input sampling
and A/D conversion time ........................ 785
Instruction features ................................... 22
Instruction format ..................................... 31
Instruction set ........................................... 35
Integer division instructions...................... 95
Interrupt controller (INTC)..................... 101
Interrupt exception handling..................... 92
Interrupt exception handling vectors
and priorities ........................................... 118
Interrupt priority level............................... 91
Interrupt response time ........................... 129
IRQ interrupts ......................................... 115
J
Jump table base register (TBR) ................ 17
L
Load-store architecture ............................. 22
Logic operation instructions ..................... 47
Low-frequency mode.............................. 270
Low-power SDRAM .............................. 275
M
Manual reset ........................................... 993
Master receive operation......................... 747
Master transmit operation ....................... 745
MCU extension mode ............................... 57
MCU operating modes.............................. 55
Module standby function ...................... 1009
MPX-I/O interface .................................. 239
MTU2 functions ..................................... 352
MTU2 interrupts ..................................... 534
MTU2 output pin initialization ............... 566
MTU2–MTU2S synchronous
operation ................................................. 522
MTU2S functions.................................... 600
Multi-function timer pulse unit 2
(MTU2)................................................... 351
Multi-function timer pulse unit 2S
(MTU2S)................................................. 599
Multiplexed pins (port A) ....................... 803
Multiplexed pins (port B)........................ 805
Multiplexed pins (port D) ....................... 807
Multiplexed pins (port F) ........................ 808
Multiply and accumulate register high
(MACH).................................................... 18
Multiply and accumulate register low
(MACL) .................................................... 18
Multiply/Multiply-and-accumulate
operations.................................................. 23
N
NMI interrupt .......................................... 114
Noise filter .............................................. 758
Nonlinearity error.................................... 791
Normal space interface............................ 232
Note on bypass capacitor .......................... 75
Note on changing operating mode ............ 59
Note on using a PLL oscillation circuit..... 75
Note on using an external crystal
resonator.................................................... 75
Notes on board design............................. 793
Notes on noise countermeasures ............. 793
O
Offset error.............................................. 791
On-board programming mode................. 920
On-chip peripheral module interrupts ..... 116
On-chip peripheral module request ......... 331
On-chip RAM ......................................... 987
Operation in asynchronous mode............ 701
Rev. 2.00 May. 08, 2008 Page 1195 of 1200
REJ09B0344-0200