SH7211 Datasheet, PDF (1038/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 24 User Debugging Interface (H-UDI)
Bit
Bit Name Initial Value R/W Description
15 to 8 TI[7:0]
11101111* R
Test Instruction
The H-UDI instruction is transferred to SDIR by a
serial input from TDI.
For commands, see table 24.3.
7 to 2 ⎯
All 1
R
Reserved
These bits are always read as 1.
1
⎯
0
R
Reserved
This bit is always read as 0.
0
⎯
1
R
Reserved
This bit is always read as 1.
Note: * The initial value of the TI[7:0] bits is a reserved value. When setting a command, the
TI[7:0] bits must be set to another value.
Table 24.3 H-UDI Commands
Bits 15 to 8
TI7 TI6 TI5 TI4 TI3 TI2 TI1 TI0 Description
0
1
1
0
—
—
—
—
H-UDI reset negate
0
1
1
1
—
—
—
—
H-UDI reset assert
1
0
0
1
1
1
0
0
TDO change timing switch
1
0
1
1
—
—
—
—
H-UDI interrupt
1
1
1
1
—
—
—
—
BYPASS mode
Other than above
Reserved
Rev. 2.00 May. 08, 2008 Page 1014 of 1200
REJ09B0344-0200