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SH7211 Datasheet, PDF (714/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family | |||
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Section 15 Serial Communication Interface with FIFO (SCIF)
Table 15.5 Bit Rates and SCBRR Settings (Clocked Synchronous Mode)
PÏ (MHz)
32
36
Bit Rate (bit/s) n
N
n
N
n
500
â
â
1k
3
124
3
140
3
2.5 k
2
199
2
224
2
5k
2
99
2
112
2
10 k
2
49
2
55
2
25 k
1
79
1
89
1
50 k
1
39
1
44
1
100 k
0
79
0
89
0
250 k
0
31
0
35
0
500 k
0
15
0
17
0
1M
0
7
0
8
0
2M
0
3
â
â
0
[Legend]
Blank: No setting possible
â: Setting possible, but error occurs
40
N
155
249
124
62
97
48
97
38
19
9
4
Rev. 2.00 May. 08, 2008 Page 690 of 1200
REJ09B0344-0200
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