SH7211 Datasheet, PDF (819/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 18 D/A Converter (DAC)
Section 18 D/A Converter (DAC)
18.1 Features
• 8-bit resolution
• Two output channels
• Maximum conversion time of 10 μs (with 20 pF load)
• Output voltage of 0 V to AVREF
• D/A output hold function in software standby mode
• Module standby mode can be set
Module data bus
Internal data bus
AVCC
AVREF
DA0
DA1
AVSS
AVREFVSS
8-bit
D/A
Control circuit
[Legend]
DADR0: D/A data register 0
DADR1: D/A data register 1
DACR: D/A control register
Figure 18.1 Block Diagram of D/A Converter
Rev. 2.00 May. 08, 2008 Page 795 of 1200
REJ09B0344-0200