SH7211 Datasheet, PDF (729/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 15 Serial Communication Interface with FIFO (SCIF)
• Transmitting Serial Data (Asynchronous Mode)
Figure 15.4 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for transmission.
Start of transmission
Read TDFE flag in SCFSR
No
TDFE = 1?
Yes
Write transmit data in SCFTDR,
[1]
and read 1 from TDFE flag
and TEND flag in SCFSR,
then clear to 0
All data transmitted?
Yes
No
[2]
Read TEND flag in SCFSR
TEND = 1?
Yes
Break output?
Yes
Clear SPB2DT to 0 and
set SPB2IO to 1
No
No
[3]
[1] SCIF status check and transmit data
write:
Read SCFSR and check that the
TDFE flag is set to 1, then write
transmit data to SCFTDR, and read 1
from the TDFE and TEND flags, then
clear to 0.
The quantity of transmit data that can
be written is 16 - (transmit trigger set
number).
[2] Serial transmission continuation
procedure:
To continue serial transmission, read
1 from the TDFE flag to confirm that
writing is possible, then write data to
SCFTDR, and then clear the TDFE
flag to 0.
[3] Break output during serial
transmission:
To output a break in serial
transmission, clear the SPB2DT bit to
0 and set the SPB2IO bit to 1 in
SCSPTR, then clear the TE bit in
SCSCR to 0.
In [1] and [2], it is possible to ascertain
the number of data bytes that can be
written from the number of transmit data
bytes in SCFTDR indicated by the upper
8 bits of SCFDR.
Clear TE bit in SCSCR to 0
End of transmission
Figure 15.4 Sample Flowchart for Transmitting Serial Data
Rev. 2.00 May. 08, 2008 Page 705 of 1200
REJ09B0344-0200