SH7211 Datasheet, PDF (851/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 19 Pin Function Controller (PFC)
19.1.3 Port B I/O Registers H, L (PBIORH, PBIORL)
PBIORH and PBIORL are 16-bit readable/writable registers that are used to set the pins on port B
as inputs or outputs. Bits PB30IOR to PB0IOR correspond to pins PB30 to PB0, respectively.
PBIOR is enabled when the port B pins are functioning as general-purpose inputs/outputs (PB9,
PB5, and PB4). In other states, PBIOR is disabled. A given pin on port B will be an output pin if
the corresponding bit in PBIORH and PBIORL is set to 1, and an input pin if the bit is cleared to
0.
Bit 15 of PBIORH is reserved. This bit is always read as 0. The write value should always be 0.
PBIORH and PBIORL are initialized to H'0000 by a power-on reset; but are not initialized by a
manual reset or in sleep mode or software standby mode.
(1) Port B I/O Register H (PBIORH)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
PB30 PB29 PB28 PB27 PB26 PB25 PB24 PB23 PB22 PB21 PB20 PB19 PB18 PB17 PB16
IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR IOR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
(2) Port B I/O Register L (PBIORL)
Bit:
Initial value:
R/W:
15
PB15
IOR
0
R/W
14
PB14
IOR
0
R/W
13
PB13
IOR
0
R/W
12
PB12
IOR
0
R/W
11
PB11
IOR
0
R/W
10
PB10
IOR
0
R/W
9
PB9
IOR
0
R/W
8
PB8
IOR
0
R/W
7
PB7
IOR
0
R/W
6
PB6
IOR
0
R/W
5
PB5
IOR
0
R/W
4
PB4
IOR
0
R/W
3
PB3
IOR
0
R/W
2
PB2
IOR
0
R/W
1
PB1
IOR
0
R/W
0
PB0
IOR
0
R/W
Rev. 2.00 May. 08, 2008 Page 827 of 1200
REJ09B0344-0200