SH7211 Datasheet, PDF (906/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 20 I/O Ports
20.4.2 Port F Data Register (PFDR)
PFDR is a 16-bit read-only register that stores port F data. Bits PF1DR and PF0DR correspond to
pins PF1 and PF0, respectively.
Even if a value is written to PFDR, the value is not written into PFDR, and it does not affect the
pin state. If PFDR is read, the pin state, not the register value, is returned directly. Table 20.8
summarizes PFDR read/write operations.
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PF1 PF0
DR DR
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
*
*
R/W: R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Note: * Depends on the external pin state.
Initial
Bit
Bit Name Value R/W
15 to 2 ⎯
All 0
R
1
PF1DR Pin state R
0
PF0DR Pin state R
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
See table 20.8.
Table 20.8 Port F Data Register (PFDR) Read/Write Operations
• PFDR bits 1 and 0
Pin Function
General input
Other than general input
Read
Pin state
Pin state
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Rev. 2.00 May. 08, 2008 Page 882 of 1200
REJ09B0344-0200