SH7211 Datasheet, PDF (554/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
(1) Example of Dead Time Compensation Setting Procedure
Figure 10.90 shows an example of dead time compensation setting procedure by using three
counters in channel 5.
Complementary PWM mode [1]
External pulse width
measurement
[2]
Start count operation in
channels 3 to 5
[3]
TCNT_5 input capture occurs [4] *
Interrupt processing
[5]
[1] Place channels 3 and 4 in complementary PWM mode. For
details, refer to section 10.4.8, Complementary PWM Mode.
[2] Specify the external pulse width measurement function for
the target TIOR in channel 5. For details, refer to section
10.4.11, External Pulse Width Measurement.
[3] Set bits CST3 and CST4 in TSTR and bits CST5U, CST5V,
and CST5W in TSTR2 to 1 to start count operation.
[4] When the capture condition specified in TIOR is satisfied,
the TCNT_5 value is captured in TGR_5.
[5] For U-phase dead time compensation, when an interrupt is
generated at the crest (TGIA_3) or trough (TCIV_4) in
complementary PWM mode, read the TGRU_5 value,
calculate the difference in time in TGRB_3, and write the
corrected value to TGRD_3 in the interrupt processing.
For the V phase and W phase, read the TGRV_5 and
TGRW_5 values and write the corrected values to TGRC_4
and TGRD_4, respectively, in the same way as for U-phase
compensation.
The TCNT_5 value should be cleared through the
TCNTCMPCLR setting or by software.
Notes: The PFC settings must be completed in advance.
* As an interrupt flag is set under the capture condition
specified in TIOR, do not enable interrupt requests in
TIER_5.
Figure 10.90 Example of Dead Time Compensation Setting Procedure
Rev. 2.00 May. 08, 2008 Page 530 of 1200
REJ09B0344-0200