SH7211 Datasheet, PDF (1172/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Item
4.1 Features
Figure 4.1 Block
Diagram of Clock Pulse
Generator
Page
62
Revision (See Manual for Details)
Figure amended
On-chip oscillator
PLL circuit 1
(×1, 2, 4)
CK
XTAL
EXTAL
Crystal
oscillator
PLL circuit 2
(×4)
(4) Divider 1
63
4.2 Input/Output Pins 65
Table 4.1 Pin
Configuration and
Functions of the Clock
Pulse Generator
Description amended
Divider 1 generates a clock signal at the operating frequency
used by the internal clock (Iφ), the bus clock (Bφ), the
peripheral clock (Pφ), the MTU2S clock (Mφ), or the AD clock
(Aφ).
Table amended
Pin Name
Clock output pin
Symbol
CK
I/O
Output
Function (Clock Operating Mode 6)
Clock output pin. This pin can be high impedance.
Rev. 2.00 May. 08, 2008 Page 1148 of 1200
REJ09B0344-0200