SH7211 Datasheet, PDF (911/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

21.2 Overview
21.2.1 Block Diagram
ROM cache address bus
ROM cache data bus (128 bits)
Section 21 Flash Memory
FCCS
FPCS
FECS
FKEY
FMATS
FTDAR
Control unit
Memory MAT unit
User MAT: 512 kbytes
User boot MAT: 12 kbytes
Flash memory
FWE pin
Mode pins
Operating
mode
[Legend]
FCCS: Flash code control and status register
FPCS: Flash program code select register
FECS: Flash erase code select register
FKEY: Flash key code register
FMATS: Flash MAT select register
FTDAR: Flash transfer destination address register
Figure 21.1 Block Diagram of Flash Memory
Rev. 2.00 May. 08, 2008 Page 887 of 1200
REJ09B0344-0200