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SH7211 Datasheet, PDF (255/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family | |||
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Section 8 Bus State Controller (BSC)
Table 8.7 16-Bit External Device Access and Data Alignment in Little-Endian Mode
Data Bus
Operation
D15 to D8
D7 to D0
Byte access at 0
â¯
Data 7 to 0
Byte access at 1
Data 7 to 0
â¯
Byte access at 2
â¯
Data 7 to 0
Byte access at 3
Data 7 to 0
â¯
Word access at 0
Data 15 to 8
Data 7 to 0
Word access at 2
Data 15 to 8
Data 7 to 0
Longword
access at 0
1st time at 0 Data 15 to 8
2nd time at 2 Data 31 to 24
Data 7 to 0
Data 23 to 16
Strobe Signals
WE1, DQMLU WE0, DQMLL
â¯
Assert
Assert
â¯
â¯
Assert
Assert
â¯
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Assert
Table 8.8 8-Bit External Device Access and Data Alignment in Little-Endian Mode
Data Bus
Operation
D15 to D8
D7 to D0
Byte access at 0
â¯
Data 7 to 0
Byte access at 1
â¯
Data 7 to 0
Byte access at 2
â¯
Data 7 to 0
Byte access at 3
â¯
Data 7 to 0
Word access at 0 1st time at 0 â¯
Data 7 to 0
2nd time at 1 â¯
Data 15 to 8
Word access at 2 1st time at 2 â¯
Data 7 to 0
2nd time at 3 â¯
Data 15 to 8
Longword
access at 0
1st time at 0 â¯
2nd time at 2 â¯
Data 7 to 0
Data 15 to 8
3rd time at 2 â¯
Data 23 to 16
4th time at 3 â¯
Data 31 to 24
Strobe Signals
WE1, DQMLU WE0, DQMLL
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
â¯
Assert
Rev. 2.00 May. 08, 2008 Page 231 of 1200
REJ09B0344-0200
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