SH7211 Datasheet, PDF (551/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
(b) Examples of MTU2S Counter Clearing Caused by MTU2 Flag Setting Source
Figures 10.86 (1) and 10.86 (2) show examples of MTS2S counter clearing caused by MTU2 flag
setting source.
TSYCR_3 H'00
H'80
TCNT_0 value in MTU2
Compare match between TCNT_0 and TGRA_0
TGRA_0
TCNT_0 in MTU2
H'0000
TCNT_4 value in MTU2S
Time
TCNT_4 in MTU2S
H'0000
Time
Figure 10.86 (1) Example of MTU2S Counter Clearing
Caused by MTU2 Flag Setting Source (1)
TSYCR_3 H'00
H'F0
TCNT_0 value in MTU2
TGRD_0
TGRB_0
TGRC_0
TGRA_0
H'0000
TCNT_4 value in MTU2S
Compare match between TCNT_0 and TGR
TCNT_0 in MTU2
Time
TCNT_4 in MTU2S
H'0000
Time
Figure 10.86 (2) Example of MTU2S Counter Clearing
Caused by MTU2 Flag Setting Source (2)
Rev. 2.00 May. 08, 2008 Page 527 of 1200
REJ09B0344-0200