SH7211 Datasheet, PDF (919/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 21 Flash Memory
21.3 Input/Output Pins
Flash memory is controlled by the pins as shown in table 21.3.
Table 21.3 Pin Configuration
Pin Name
Power-on reset
Flash programming
enable
Mode 1
Mode 0
Transmit data
Receive data
Symbol
RES
FWE
MD1
MD0
TXD1 (PA25)
RXD1 (PA24)
Input/Output
Input
Input
Input
Input
Output
Input
Function
Reset
Hardware protection when
programming flash memory
Sets operating mode of this LSI
Sets operating mode of this LSI
Serial transmit data output (used in
boot mode)
Serial receive data input (used in boot
mode)
21.4 Register Descriptions
21.4.1 Registers
The registers/parameters which control flash memory when the on-chip flash memory is valid are
shown in table 21.4.
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 21.5.
Rev. 2.00 May. 08, 2008 Page 895 of 1200
REJ09B0344-0200