SH7211 Datasheet, PDF (357/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 9 Direct Memory Access Controller (DMAC)
9.4.3 Channel Priority
When the DMAC receives simultaneous transfer requests on two or more channels, it selects a
channel according to a predetermined priority order. Three modes (fixed mode 1, fixed mode 2,
and round-robin mode) are selected using the PR1 and PR0 bits in DMAOR.
(1) Fixed Mode
In fixed modes, the priority levels among the channels remain fixed. There are two kinds of fixed
modes as follows:
Fixed mode 1: CH0 > CH1 > CH2 > CH3 > CH4 > CH5 > CH6 > CH7
Fixed mode 2: CH0 > CH4 > CH1 > CH5 > CH2 > CH6 > CH3 > CH7
These are selected by the PR1 and PR0 bits in the DMA operation register (DMAOR).
(2) Round-Robin Mode
Each time one unit of word, byte, longword, or 16 bytes is transferred on one channel, the priority
order is rotated. The channel on which the transfer was just finished is rotated to the lowest of the
priority order among the four round-robin channels (channels 0 to 4). The priority of the channels
other than the round-robin channels (channels 0 to 4) does not change even in round-robin mode.
The round-robin mode operation is shown in figure 9.3. The priority in round-robin mode is CH0
> CH1 > CH2 > CH3 > CH4 > CH5 > CH6 > CH7 immediately after a reset.
When round-robin mode has been specified, do not concurrently specify cycle steal mode and
burst mode as the bus modes of any two or more channels.
Rev. 2.00 May. 08, 2008 Page 333 of 1200
REJ09B0344-0200