SH7211 Datasheet, PDF (280/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 8 Bus State Controller (BSC)
CK
A25 to A0
A12/A11*¹
CSn
RASL
CASL
RD/WR
DQMxx
D15 to D0
BS
DACKn*²
Tr
Tc1
Tc2
Tc3
Tc4 Trwl
Tap
Notes: 1. Address pin to be connected to pin A10 of SDRAM.
2. The waveform for DACKn is when active low is specified.
Figure 8.17 Basic Timing for Burst Write (Auto-Precharge)
Rev. 2.00 May. 08, 2008 Page 256 of 1200
REJ09B0344-0200