SH7211 Datasheet, PDF (674/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 14 Watchdog Timer (WDT)
Figure 14.1 shows a block diagram of the WDT.
Standby
cancellation
Interrupt
request
WDTOVF
Internal reset
request*
Standby
control
Interrupt
control
Reset
control
WDT
WRCSR
Clock selection
Divider
Clock selector
Overflow
Clock
WTCSR
WTCNT
Standby
mode
Peripheral
clock
Bus interface
[Legend]
WTCSR:
WTCNT:
WRCSR:
Watchdog timer control/status register
Watchdog timer counter
Watchdog reset control/status register
Note: * The internal reset signal can be generated by making a register setting.
Figure 14.1 Block Diagram of WDT
Rev. 2.00 May. 08, 2008 Page 650 of 1200
REJ09B0344-0200