SH7211 Datasheet, PDF (836/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 19 Pin Function Controller (PFC)
19.1.2 Port A Control Registers H1 to H3, L1 to L4 (PACRH1 to PACRH3, PACRL1 to
PACRL4)
PACRH1 to PACRH3 and PACRL1 to PACRL4 are 16-bit readable/writable registers that are
used to select the functions of the multiplexed pins on port A.
PACRH1 to PACRH3 and PACRL1 to PACRL4 are initialized to the values shown in table 19.5
by a power-on reset; but are not initialized by a manual reset or in sleep mode or software standby
mode.
(1) Port A Control Register H3 (PACRH3)
Bit: 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
-
-
PA25MD[2:0]
-
PA24MD[2:0]
Initial value: 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R
R
R R/W R/W R/W R R/W R/W R/W
Initial
Bit
Bit Name Value R/W Description
15 to 7 ⎯
All 0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
6 to 4 PA25MD[2:0] 000* R/W PA25 Mode
Select the function of the
PA25/A25/IRQ7/TIOC0D/TXD1 pin.
• Area 0: 16-bit mode/8-bit mode
000: PA25 I/O (port)
001: A25 output (BSC) (initial value)
010: Setting prohibited
011: IRQ7 input (INTC)
100: TIOC0D I/O (MTU2)
101: TXD1 output (SCIF)
110: Setting prohibited
111: Setting prohibited
3
⎯
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
Rev. 2.00 May. 08, 2008 Page 812 of 1200
REJ09B0344-0200