SH7211 Datasheet, PDF (88/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 4 Clock Pulse Generator (CPG)
(6) Standby Control Circuit
The standby control circuit controls the states of the clock pulse generator and other modules
during clock switching, or sleep or software standby mode.
(7) Frequency Control Register (FRQCR)
The frequency control register (FRQCR) has control bits assigned for the following functions:
clock output/non-output from the CK pin during software standby mode, the frequency
multiplication ratio of PLL circuit 1, and the frequency division ratio of the internal clock (Iφ) and
the peripheral clock (Pφ).
(8) MTU2S Clock Frequency Control Register (MCLKCR)
The MTU2S clock frequency control register (MCLKCR) has control bits assigned for the
following functions: MTU2S clock (Mφ) output/non-output and the frequency division ratio.
(9) AD Clock Frequency Control Register (ACLKCR)
The AD clock frequency control register (ACLKCR) has control bits assigned for the following
functions: AD clock (Aφ) output/non-output and the frequency division ratio.
(10) Standby Control Register
The standby control register has bits for controlling the power-down modes. See section 23,
Power-Down Modes, for more information.
Rev. 2.00 May. 08, 2008 Page 64 of 1200
REJ09B0344-0200