SH7211 Datasheet, PDF (941/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 21 Flash Memory
(4) Erasure Execution
When flash memory is erased, the erase-block number on the user MAT must be passed to the
erasing program which is downloaded. This is set to the FEBS parameter (general register R4).
One block is specified from the block number 0 to 15.
For details on the erasing procedure, see section 21.5.2, User Program Mode.
(4.1) Flash Erase Block Select Parameter (FEBS: General Register R4 of CPU)
This parameter specifies the erase-block number. Several block numbers cannot be specified.
Bit: 31
-
Initial value: -
R/W: R/W
30
-
-
R/W
29
-
-
R/W
28
-
-
R/W
27
-
-
R/W
26
-
-
R/W
25
-
-
R/W
24
-
-
R/W
23
-
-
R/W
22
-
-
R/W
21
-
-
R/W
20
-
-
R/W
19
-
-
R/W
18
-
-
R/W
17
-
-
R/W
16
-
-
R/W
Bit: 15
-
Initial value: -
R/W: R/W
14
-
-
R/W
13
-
-
R/W
12
-
-
R/W
11
-
-
R/W
10
-
-
R/W
9
-
-
R/W
8
-
-
R/W
7
-
R/W
6
-
R/W
5
-
R/W
4
3
EBS[7:0]
-
-
R/W R/W
2
-
R/W
1
-
R/W
0
-
R/W
Bit
Bit Name
31 to 8 ⎯
Initial
Value
R/W
Undefined R/W
7 to 0 EBS[7:0] Undefined R/W
Description
Unused
Return 0.
Set the erase-block number in the range from 0 to 11. 0
corresponds to the EB0 block and 11 corresponds to
the EB11 block. An error occurs when a number other
than 0 to 11 (H'00 to H'0B) is set.
Rev. 2.00 May. 08, 2008 Page 917 of 1200
REJ09B0344-0200