SH7211 Datasheet, PDF (949/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 21 Flash Memory
(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Parts of the procedure program that are made by the user, like download request,
programming/erasing procedure, and decision of the result, must be executed in the on-chip RAM.
All of the on-chip program that is to be downloaded is in on-chip RAM. Note that on-chip RAM
must be controlled so that these parts do not overlap.
Figure 21.10 shows the program area to be downloaded.
Area to be
downloaded
(Size: 3 kbytes)
Unusable area in
programming/erasing
processing period
<On-chip RAM>
Area that can be
used by user
Address
RAMTOP (H'FFFF8000)
DPFR
FTDAR setting
(Return value: 1 byte)
System use area
(15 bytes)
Programming/
erasing entry
FTDAR setting+16
Initialization
process entry
FTDAR setting+32
Initialization +
programming program
or Initialization +
erasing program
FTDAR setting+3072
Area that can be
used by user
RAMEND (H'FFF87FFF)
Figure 21.10 RAM Map after Download
Rev. 2.00 May. 08, 2008 Page 925 of 1200
REJ09B0344-0200