SH7211 Datasheet, PDF (1150/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 27 Electrical Characteristics
27.4.4 UBC Trigger Timing
Table 27.9 UBC Trigger Timing
Conditions: Vcc = PLLVcc = 1.4 to 1.6 V, VccQ = 3.0 to 3.6 V, Vss = PLLVss = VssQ = 0 V,
Ta = −40°C to +85°C
Item
UBCTRG delay time
Symbol Min.
t_UBCTGD
—
Max. Unit
20
ns
Figure
Figure 27.39
CK
UBCTRG
t_UBCTGD
Figure 27.39 UBC Trigger Timing
27.4.5 DMAC Module Timing
Table 27.10 DMAC Module Timing
Conditions: Vcc = PLLVcc = 1.4 to 1.6 V, VccQ = 3.0 to 3.6 V, Vss = PLLVss = VssQ = 0 V,
Ta = −40°C to +85°C
Item
DREQ setup time
DREQ hold time
DACK, TEND delay time
Symbol Min.
t_DRQS
20
t_DRQH
20
t_DACD
—
Max. Unit
—
ns
—
20
Figure
Figure 27.40
Figure 27.41
CK
DREQn
t_DRQS t_DRQH
Note: n = 0 to 3
Figure 27.40 DREQ Input Timing
Rev. 2.00 May. 08, 2008 Page 1126 of 1200
REJ09B0344-0200