SH7211 Datasheet, PDF (471/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
(2) Example of Synchronous Operation
Figure 10.13 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and
synchronous clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOC0A, TIOC1A, and TIOC2A. At this
time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, are
performed for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM
cycle.
For details of PWM modes, see section 10.4.5, PWM Modes.
TCNT0 to TCNT2
values
TGRB_0
TGRB_1
TGRA_0
TGRB_2
TGRA_1
TGRA_2
H'0000
Synchronous clearing by TGRB_0 compare match
Time
TIOC0A
TIOC1A
TIOC2A
Figure 10.13 Example of Synchronous Operation
Rev. 2.00 May. 08, 2008 Page 447 of 1200
REJ09B0344-0200