SH7211 Datasheet, PDF (964/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 21 Flash Memory
21.6 Protection
There are three kinds of flash memory program/erase protection: hardware, software, and error
protection.
21.6.1 Hardware Protection
Programming and erasing of flash memory is forcibly disabled or suspended by hardware
protection. In this state, the downloading of an on-chip program and initialization of the flash
memory are possible. However, an activated program for programming or erasure cannot program
or erase locations in a user MAT, and the error in programming/erasing is reported in the FPFR
parameter.
Table 21.8 Hardware Protection
Function to be Protected
Item
Description
Download
Programming/
Erasure
FWE-pin protection The input of a low-level signal on the FWE —
√
pin clears the FWE bit of FCCS and the LSI
enters a programming/erasing-protected
state.
Reset/standby
• A power-on reset (including a power-on √
√
protection
reset by the WDT) and entry to standby
mode initializes the programming/erasing
interface registers and the LSI enters a
programming/erasing-protected state.
• Resetting by means of the RES pin after
power is initially supplied will not make
the LSI enter the reset state unless the
RES pin is held low until oscillation has
stabilized. In the case of a reset during
operation, hold the RES pin low for the
RES pulse width that is specified in the
section on AC characteristics. If the LSI is
reset during programming or erasure,
data in the flash memory is not
guaranteed. In this case, execute erasure
and then execute programming again.
Rev. 2.00 May. 08, 2008 Page 940 of 1200
REJ09B0344-0200