SH7211 Datasheet, PDF (814/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 17 A/D Converter (ADC)
17.5 Interrupt Sources and DMAC Transfer Requests
The A/D converter generates A/D conversion end interrupts (ADI). An ADI interrupt generation is
enabled when the ADIE bit in ADCR is set to 1. The DMAC can be activated by the DMAC
setting when an ADI interrupt is generated. At this time, no interrupt to the CPU is generated.
When the DMAC is activated by an ADI interrupt, the ADF bit in ADSR is automatically cleared
at the data transfer by the DMAC.
Rev. 2.00 May. 08, 2008 Page 790 of 1200
REJ09B0344-0200