SH7211 Datasheet, PDF (731/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 15 Serial Communication Interface with FIFO (SCIF)
Figure 15.5 shows an example of the operation for transmission.
Serial
data
Start
1 bit
0 D0
Data
Parity Stop Start
bit bit bit
D1
D7 0/1 1
0 D0
Parity Stop
Data
bit
bit
1
D1
D7 0/1 1
Idle state
(mark state)
TDFE
TEND
TXI interrupt
request
Data written to SCFTDR and TDFE
flag read as 1 then cleared to 0 by
TXI interrupt handler
One frame
TXI interrupt
request
Figure 15.5 Example of Transmit Operation
(8-Bit Data, Parity, 1 Stop Bit)
Rev. 2.00 May. 08, 2008 Page 707 of 1200
REJ09B0344-0200