SH7211 Datasheet, PDF (767/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 16 I²C Bus Interface 3 (IIC3)
16.3.10 NF2CYC Register (NF2CYC)
NF2CYC is an 8-bit readable/writable register that selects the range of the noise filtering for the
SCL and SDA pins. For details of the noise filter, see section 16.4.7, Noise Filter.
NF2CYC is initialized to H'00 by a power-on reset.
Bit: 7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
NF2
CYC
Initial value: 0
0
0
0
0
0
0
0
R/W: R
R
R
R
R
R
R R/W
Bit
7 to 1
0
Bit Name
⎯
Initial
Value
All 0
NF2CYC 0
R/W Description
R Reserved
These bits are always read as 0. The write value should
always be 0.
R/W Noise Filtering Range Select
0: The noise less than one cycle of the peripheral clock
can be filtered out
1: The noise less than two cycles of the peripheral clock
can be filtered out
Rev. 2.00 May. 08, 2008 Page 743 of 1200
REJ09B0344-0200