SH7211 Datasheet, PDF (811/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

Section 17 A/D Converter (ADC)
17.4.4 A/D Converter Activation by MTU2 and MTU2S
A/D conversion is activated by the A/D conversion start triggers (TRGAN, TRG0N, TRG4N, and
TRG4BN) from the MTU2 and A/D conversion start triggers (TRGAN, TRG4AN, and TRG4BN)
from the MTU2S. To enable this function, set the TRGE bit in ADCR to 1 and clear the EXTRG
bit to 0. After this setting is made, if an A/D conversion start trigger from the MTU2 or MTU2S is
generated, the ADST bit is set to 1. The timing between the setting of the ADST bit and the start
of the A/D conversion is the same for all A/D conversion activation sources.
The A/D conversion start trigger must be input after ADCR, ADSTRGR, and ADANSR registers
have been set.
Rev. 2.00 May. 08, 2008 Page 787 of 1200
REJ09B0344-0200