SH7211 Datasheet, PDF (20/1228 Pages) Renesas Technology Corp – 32-Bit RISC Microcomputer SuperHTM RISC engine Family

17.4.6 Example of ADDR Auto-Clear Function.............................................................. 788
17.5 Interrupt Sources and DMAC Transfer Requests .............................................................. 790
17.6 Definitions of A/D Conversion Accuracy.......................................................................... 791
17.7 Usage Notes ....................................................................................................................... 793
17.7.1 Analog Input Voltage Range ................................................................................ 793
17.7.2 Relationship between AVcc, AVss and Vcc, Vss................................................. 793
17.7.3 Range of AVREF Pin Settings.............................................................................. 793
17.7.4 Notes on Board Design ......................................................................................... 793
17.7.5 Notes on Noise Countermeasures ......................................................................... 794
17.7.6 Notes on Register Setting ..................................................................................... 794
17.7.7 Treatment of AVcc and AVss When the A/D Converter is Not Used .................. 794
Section 18 D/A Converter (DAC) ....................................................................... 795
18.1 Features.............................................................................................................................. 795
18.2 Input/Output Pins............................................................................................................... 796
18.3 Register Descriptions ......................................................................................................... 797
18.3.1 D/A Data Registers 0 and 1 (DADR0 and DADR1)............................................. 797
18.3.2 D/A Control Register (DACR) ............................................................................. 798
18.4 Operation ........................................................................................................................... 800
18.5 Usage Notes ....................................................................................................................... 801
18.5.1 Module Standby Mode Setting ............................................................................. 801
18.5.2 D/A Output Hold Function in Software Standby Mode........................................ 801
18.5.3 Setting Analog Input Voltage ............................................................................... 801
Section 19 Pin Function Controller (PFC) ..........................................................803
19.1 Register Descriptions ......................................................................................................... 809
19.1.1 Port A I/O Registers H, L (PAIORH, PAIORL)................................................... 811
19.1.2 Port A Control Registers H1 to H3, L1 to L4
(PACRH1 to PACRH3, PACRL1 to PACRL4) ................................................... 812
19.1.3 Port B I/O Registers H, L (PBIORH, PBIORL) ................................................... 827
19.1.4 Port B Control Registers H1 to H4, L1 to L4
(PBCRH1 to PBCRH4, PBCRL1 to PBCRL4) .................................................... 828
19.1.5 Port D I/O Register (PDIOR)................................................................................ 844
19.1.6 Port D Control Registers L1 to L4 (PDCRL1 to PDCRL4).................................. 844
19.1.7 Port F Control Register L1 (PFCRL1).................................................................. 857
19.1.8 IRQOUT Function Control Register (IFCR) ........................................................ 859
19.1.9 WAVE Function Control Registers 1, 2 (WAVECR1, WAVECR2) ................... 860
Section 20 I/O Ports.............................................................................................863
20.1 Port A................................................................................................................................. 863
Rev. 2.00 May. 08, 2008 Page xx of xxiv
REJ09B0344-0200