EFM32WG Datasheet, PDF (90/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
Write to 1 to set the corresponding DMA channel complete interrupt flag.
1
CH1DONE
0
W1
DMA Channel 1 Complete Interrupt Flag Set
Write to 1 to set the corresponding DMA channel complete interrupt flag.
0
CH0DONE
0
W1
DMA Channel 0 Complete Interrupt Flag Set
Write to 1 to set the corresponding DMA channel complete interrupt flag.
8.7.22 DMA_IFC - Interrupt Flag Clear Register
Offset
0x1008
Reset
Access
Bit Position
Name
Bit
31
30:12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Reset
Access Description
ERR
0
W1
DMA Error Interrupt Flag Clear
Set to 1 to clear DMA error interrupt flag. Note that if an error happened, the Bus Error Clear Register must be used to clear the DMA.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CH11DONE
0
W1
DMA Channel 11 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH10DONE
0
W1
DMA Channel 10 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH9DONE
0
W1
DMA Channel 9 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH8DONE
0
W1
DMA Channel 8 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH7DONE
0
W1
DMA Channel 7 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH6DONE
0
W1
DMA Channel 6 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH5DONE
0
W1
DMA Channel 5 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH4DONE
0
W1
DMA Channel 4 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH3DONE
0
W1
DMA Channel 3 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH2DONE
0
W1
DMA Channel 2 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH1DONE
0
W1
DMA Channel 1 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
CH0DONE
0
W1
DMA Channel 0 Complete Interrupt Flag Clear
Write to 1 to clear the corresponding DMA channel complete interrupt flag.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
90
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