EFM32WG Datasheet, PDF (397/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
Name
Reset
Access Description
This field indicates that the programmed transfer is complete on the AHB as well as on the USB, for this endpoint.
15.6.62 USB_DOEP0TSIZ - Device OUT Endpoint 0 Transfer Size Register
The application must modify this register before enabling the endpoint. Once the endpoint is enabled
using Endpoint Enable bit of the Device Endpoint x+1 Control register (USB_DOEPx_CTL.EPENA), the
core modifies this register. The application can only read this register once the core has cleared the
Endpoint Enable bit.
Offset
0x3CB10
Bit Position
Reset
Access
Name
Bit
31
30:29
28:20
19
18:7
6:0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
SUPCNT
0x0
RW
SETUP Packet Count
This field specifies the number of back-to-back SETUP data packets the endpoint can receive.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PKTCNT
0
RW
Packet Count
This field is decremented to zero after a packet is written into the RxFIFO.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
XFERSIZE
0x00
RW
Transfer Size
Indicates the transfer size in bytes for endpoint 0. The core interrupts the application only after it has exhausted the transfer size
amount of data. The transfer size can be set to the maximum packet size of the endpoint, to be interrupted at the end of each packet.
The core decrements this field every time a packet is read from the RxFIFO and written to the external memory.
15.6.63 USB_DOEP0DMAADDR - Device OUT Endpoint 0 DMA Address
Register
Offset
0x3CB14
Bit Position
Reset
Access
Name
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
397
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