EFM32WG Datasheet, PDF (486/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
31:13
12
11
10
9
8
7
6
5
4
3
2:1
0
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CCF
0
W1
Clear Collision Check Fail Interrupt Flag
Write to 1 to clear the CCF interrupt flag.
SSM
0
W1
Clear Slave-Select In Master Mode Interrupt Flag
Write to 1 to clear the SSM interrupt flag.
MPAF
0
W1
Clear Multi-Processor Address Frame Interrupt Flag
Write to 1 to clear the MPAF interrupt flag.
FERR
0
W1
Clear Framing Error Interrupt Flag
Write to 1 to clear the FERR interrupt flag.
PERR
0
W1
Clear Parity Error Interrupt Flag
Write to 1 to clear the PERR interrupt flag.
TXUF
0
W1
Clear TX Underflow Interrupt Flag
Write to 1 to clear the TXUF interrupt flag.
TXOF
0
W1
Clear TX Overflow Interrupt Flag
Write to 1 to clear the TXOF interrupt flag.
RXUF
0
W1
Clear RX Underflow Interrupt Flag
Write to 1 to clear the RXUF interrupt flag.
RXOF
0
W1
Clear RX Overflow Interrupt Flag
Write to 1 to clear the RXOF interrupt flag.
RXFULL
0
W1
Clear RX Buffer Full Interrupt Flag
Write to 1 to clear the RXFULL interrupt flag.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
TXC
0
W1
Clear TX Complete Interrupt Flag
Write to 1 to clear the TXC interrupt flag.
17.5.20 USARTn_IEN - Interrupt Enable Register
Offset
0x04C
Reset
Access
Bit Position
Name
Bit
31:13
12
11
10
9
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CCF
0
RW
Collision Check Fail Interrupt Enable
Enable interrupt on collision check error detected.
SSM
0
RW
Slave-Select In Master Mode Interrupt Enable
Enable interrupt on slave-select in master mode.
MPAF
0
RW
Multi-Processor Address Frame Interrupt Enable
Enable interrupt on multi-processor address frame.
FERR
0
RW
Framing Error Interrupt Enable
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
486
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