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EFM32WG Datasheet, PDF (191/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
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Figure 14.29. EBI NAND Flash Data Input Timing
EBI_AD[ x] = NAND ALE
EBI_AD[ y] = NAND CLE
EBI_AD[ 7:0] = NAND IO
GPIO or EBI_CSn = NAND CEn
EBI_NANDWEn = NAND WEn
WRSETUP
(0, 1, 2, ...)
t ALS
WRSTRB
(1, 2, 3, ...)
WRHOLD
(0, 1, 2, ...)
t ALH
t CLS
t CLH
t DS
DATA IN
t CS
t WP
t DH
t CH
t WC
t WH
The EBI_WRTIMING(n) setting requirements for satisfying the NAND Flash timing parameters for
command latching, address latching and data input timing are shown in Table 14.5 (p. 191) .
Table 14.5. EBI NAND Flash Write Timing
NAND Flash Write Timing Parameter
tADL
tALS
tCS
tCLS
tDS
tALH
tCH
tCLH
tDH
tWC
tWH
tWP
tWB
EBI Write Timing Parameter Requirements
<= t(WRHOLD) + t(WRSETUP) + t(WRSTRB)
<= t(WRSETUP) + t(WRSTRB)
<= t(WRSETUP) + t(WRSTRB)
<= t(WRSETUP) + t(WRSTRB)
<= t(WRSETUP) + t(WRSTRB)
<= t(WRHOLD)
<= t(WRHOLD)
<= t(WRHOLD)
<= t(WRHOLD)
<= t(WRHOLD) + t(WRSETUP) + t(WRSTRB)
<= t(WRHOLD) + t(WRSETUP)
<= t(WRSTRB)
(R/B edges can be detected by edge triggered GPIO
interrupts)
NAND Flash read timing is defined in the EBI_RDTIMING(n) register. Figure 14.30 (p. 192) shows
the NAND Flash data output timing assuming the D8A8 address mode.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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