English
Language : 

EFM32WG Datasheet, PDF (200/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
...the world's most energy friendly microcontrollers
and VSYNC interrupts are generated at the same time as the local copy of EBI_TFTFRAMEBASE is
made. If software reprograms EBI_TFTFRAMEBASE in the interrupt service routine, then the new value
will only be used for address generation of the next line (in case FBCTRIG equals HSYNC) or the
next frame (in case FBCTRIG equals VSYNC). For example, when FBCTRIG equals HSYNC and the
interrupt service routine triggered by the HSYNC interrupt reads VCNT as 0, then a software update
of EBI_TFTFRAMEBASE will take effect for Direct Drive addresses of the line which corresponds to a
VCNT value of 1. Note that the EBI_TFTSTRIDE register is not relevant in case the FBCTRIG is set to
HSYNC as the HSYNC events reloads the internal frame base copy (FBC) with EBI_TFTFRAMEBASE
at the start of each line. The Direct Drive address computation is summarized in Figure 14.37 (p. 200) .
Figure 14.37. EBI Direct Drive Address
P( 0 ,0 )
P( 0 ,1 )
P( 0 ,2 )
P( 1 ,0 )
P( 1 ,1 )
P( 1 ,2 )
P( 2 ,0 )
P( 2 ,1 )
P( 2 ,2 )
P( 3 ,0 )
P( 3 ,1 )
P( 3 ,2 )
HBPORCH
Visible Display
P( HSZ ,0 )
P( HSZ ,1 )
P( HSZ ,2 )
HFPORCH
P(0,VSZ) P(1,VSZ) P(2,VSZ) P(3,VSZ)
P( HSZ , VSZ )
FBCTRIG = VSYNC:
Local fram e base copy FBC get s assigned wit h EBI_TFTFRAMEBASE on every EBI_VSYNC st obe.
Direct Drive Address for pixel P(x,y) = FBC + (x * PSZ) + (y * ((PSZ * (HSZ + 1)) + HSTRIDE))
FBCTRIG = HSYNC:
Local fram e base copy FBC get s assigned wit h EBI_TFTFRAMEBASE on every EBI_HSYNC st obe.
Direct Drive Address for pixel P(x,y) = FBC + (x * PSZ)
The address increm ent per pixel (PSZ) is 1 if t he WIDTH bit field in EBI_TFTCTRL is program m ed t o BYTE and 2 if t he
WIDTH bit field is program m ed t o HALFWORD.
Note
In case that the memory bank used for external Direct Drive is defined as 16-bit wide, then
the Direct Drive address is internally shifted one bit to the right before being output on the
EBI_AD or EBI_A lines.
14.3.17 Alpha Blending and Masking
Automatic alpha blending and masking can be performed on AHB data written to or via the EBI. Alpha
blending combines a foreground color with a background color into a new blended color and is further
described in Section 14.3.17.1 (p. 201) . Masking is a mechanism to suppress writes matching a
specific color. It is used to preserve the background color and is further described in Section 14.3.17.2 (p.
202) . Masking, if enabled, is applied before alpha blending as shown in Figure 14.38 (p. 201) .
Masking and alpha blending can be used for both internal and external data transfers.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
200
www.energymicro.com