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EFM32WG Datasheet, PDF (17/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
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The embedded SRAM is located at address 0x20000000 in the memory map of the EFM32WG. When
running code located in SRAM starting at this address, the Cortex-M4 uses the System bus to fetch
instructions. This results in reduced performance as the Cortex-M4 accesses stack, other data in SRAM
and peripherals using the System bus. To be able to run code from SRAM efficiently, the SRAM is also
mapped in the code space at address 0x10000000. When running code from this space, the Cortex-M4
fetches instructions through the I/D-Code bus interface, leaving the System bus for data access. The
SRAM mapped into the code space can however only be accessed by the CPU, i.e. not the DMA.
5.2.1 Bit-banding
The SRAM bit-band alias and peripheral bit-band alias regions are located at 0x22000000 and
0x42000000 respectively. Read and write operations to these regions are converted into masked single-
bit reads and atomic single-bit writes to the embedded SRAM and peripherals of the EFM32WG.
The standard approach to modify a single register or SRAM bit in the aliased regions, requires software
to read the value of the byte, half-word or word containing the bit, modify the bit, and then write the byte,
half-word or word back to the register or SRAM address. Using bit-banding, this can be done in a single
operation. As read-writeback, bit-masking and bit-shift operations are not necessary in software, code
size is reduced and execution speed improved.
The bit-band regions allows addressing each individual bit in the SRAM and peripheral areas of the
memory map. To set or clear a bit in the embedded SRAM, write a 1 or a 0 to the following address:
Memory SRAM Area Set/Clear Bit
bit_address = 0x22000000 + (address – 0x20000000) × 32 + bit × 4,
(5.1)
where address is the address of the 32-bit word containing the bit to modify, and bit is the index of the
bit in the 32-bit word.
To modify a bit in the Peripheral area, use the following address:
Memory Peripheral Area Bit Modification
bit_address = 0x42000000 + (address – 0x40000000) × 32 + bit × 4,
(5.2)
where address and bit are defined as above.
5.2.2 Peripherals
The peripherals are mapped into the peripheral memory segment, each with a fixed size address range
according to Table 5.1 (p. 18) , Table 5.2 (p. 19) and Table 5.3 (p. 20) .
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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