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EFM32WG Datasheet, PDF (321/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.
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The application must read the Current Mode bit in the OTG Control and Status register to determine
Device mode operation.
4. The B-device detects the connection, issues a USB reset, and enumerates the core for data traffic.
5. The B-device continues the host role, initiating traffic, and suspends the bus when done.
The core sets the Early Suspend bit in the Core Interrupt register after 3 ms of bus idleness. Following
this, the core sets the USB Suspend bit in the Core Interrupt register.
6. In Negotiated mode, the core detects the suspend, disconnects, and switches back to the host role.
The core turns on the D+ and D- pulldown resistors to indicate its assumption of the host role.
7. The core sets the Connector ID Status Change interrupt in the OTG Interrupt Status register. The
application must read the connector ID status in the OTG Control and Status register to determine
the core’s operation as an A-device. This indicates the completion of HNP to the application. The
application must read the Current Mode bit in the OTG Control and Status register to determine Host
mode operation.
8. The B-device connects, completing the HNP process.
15.4.5.4 B-Device Host Negotiation Protocol
HNP switches the USB host role from B-device to A-device. The application must set the HNP-Capable
bit in the Core USB Configuration register to enable the core to perform HNP as a B-device.
1. The A-device sends the SetFeature b_hnp_enable descriptor to enable HNP support. The core’s ACK
response indicates that it supports HNP. The application must set the Device HNP Enable bit in the
OTG Control and Status register to indicate HNP support.
The application sets the HNP Request bit in the OTG Control and Status register to indicate to the
core to initiate HNP.
2. When it has finished using the bus, the A-device suspends by writing the Port Suspend bit in the Host
Port Control and Status register.
The core sets the Early Suspend bit in the Core Interrupt register after 3 ms of bus idleness. Following
this, the core sets the USB Suspend bit in the Core Interrupt register.
The core disconnects and the A-device detects SE0 on the bus, indicating HNP. The core enables
the D+ and D- pulldown resistors to indicate its assumption of the host role.
The A-device responds by activating its D+ pull-up resistor within 3 ms of detecting SE0. The core
detects this as a connect.
The core sets the Host Negotiation Success Status Change interrupt in the OTG Interrupt Status
register, indicating the HNP status. The application must read the Host Negotiation Success bit in the
OTG Control and Status register to determine host negotiation success. The application must read the
Current Mode bit in the Core Interrupt register (USB_GINTSTS) to determine Host mode operation.
3. The application sets the reset bit (USB_HPRT.PRTRST) and the core issues a USB reset and
enumerates the A-device for data traffic
4. The core continues the host role of initiating traffic, and when done, suspends the bus by writing the
Port Suspend bit in the Host Port Control and Status register.
5. In Negotiated mode, when the A-device detects a suspend, it disconnects and switches back to the
host role. The core disables the D+ and D- pulldown resistors to indicate the assumption of the device
role.
6. The application must read the Current Mode bit in the Core Interrupt (USB_GINTSTS) register to
determine the Host mode operation.
7. The core connects, completing the HNP process.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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