EFM32WG Datasheet, PDF (548/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
15:14
13:12
11:10
9:8
7:5
4
3
2
1:0
Name
Value
8
9
10
11
Reset
Mode
PRSCH8
PRSCH9
PRSCH10
PRSCH11
Access Description
Description
PRS Channel 8 selected as input
PRS Channel 9 selected as input
PRS Channel 10 selected as input
PRS Channel 11 selected as input
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
CUFOA
0x0
RW
Select output action on counter underflow.
Counter Underflow Output Action
Value
0
1
2
3
Mode
NONE
TOGGLE
CLEAR
SET
Description
No action on counter underflow
Toggle output on counter underflow
Clear output on counter underflow
Set output on counter underflow
COFOA
0x0
RW
Select output action on counter overflow.
Counter Overflow Output Action
Value
0
1
2
3
Mode
NONE
TOGGLE
CLEAR
SET
Description
No action on counter overflow
Toggle output on counter overflow
Clear output on counter overflow
Set output on counter overflow
CMOA
0x0
RW
Select output action on compare match.
Compare Match Output Action
Value
0
1
2
3
Mode
NONE
TOGGLE
CLEAR
SET
Description
No action on compare match
Toggle output on compare match
Clear output on compare match
Set output on compare match
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
COIST
0
RW
Compare Output Initial State
This bit is only used in Output Compare and PWM mode. When this bit is set in compare mode,the output is set high when the counter
is disabled. When counting resumes, this value will represent the initial value for the output. If the bit is cleared, the output will be
cleared when the counter is disabled. In PWM mode, the output will always be low when disabled, regardless of this bit. However,
this bit will represent the initial value of the output, once it is enabled.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
OUTINV
0
RW
Output Invert
Setting this bit inverts the output from the CC channel (Output compare,PWM).
MODE
0x0
RW
CC Channel Mode
These bits select the mode for Compare/Capture channel.
Value
0
1
2
3
Mode
OFF
INPUTCAPTURE
OUTPUTCOMPARE
PWM
Description
Compare/Capture channel turned off
Input capture
Output compare
Pulse-Width Modulation
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
548
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