EFM32WG Datasheet, PDF (448/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

Table 17.3. USART Data Bits
DATA BITS [3:0]
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
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Number of Data bits
4
5
6
7
8 (Default)
9
10
11
12
13
14
15
16
Table 17.4. USART Stop Bits
STOP BITS [1:0]
00
01
10
11
Number of Stop bits
0.5
1 (Default)
1.5
2
The order in which the data bits are transmitted and received is defined by MSBF in USARTn_CTRL.
When MSBF is cleared, data in a frame is sent and received with the least significant bit first. When it
is set, the most significant bit comes first.
The frame format used by the transmitter can be inverted by setting TXINV in USARTn_CTRL, and the
format expected by the receiver can be inverted by setting RXINV in USARTn_CTRL. These bits affect
the entire frame, not only the data bits. An inverted frame has a low idle state, a high start-bit, inverted
data and parity bits, and low stop-bits.
17.3.2.1.1 Parity bit Calculation and Handling
When parity bits are enabled, hardware automatically calculates and inserts any parity bits into outgoing
frames, and verifies the received parity bits in incoming frames. This is true for both asynchronous and
synchronous modes, even though it is mostly used in asynchronous communication. The possible parity
modes are defined in Table 17.5 (p. 449) . When even parity is chosen, a parity bit is inserted to make
the number of high bits (data + parity) even. If odd parity is chosen, the parity bit makes the total number
of high bits odd.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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