EFM32WG Datasheet, PDF (475/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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Bit
11:10
9:8
7:4
3:0
Name
Value
1
2
3
Reset
Mode
ONE
ONEANDAHALF
TWO
Access Description
Description
One stop bit is generated and verified
The transmitter generates one and a half stop bit. The receiver verifies the first stop bit
The transmitter generates two stop bits. The receiver checks the first stop-bit only
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
PARITY
0x0
RW
Parity-Bit Mode
Determines whether parity bits are enabled, and whether even or odd parity should be used. Only available in asynchronous mode.
Value
0
2
3
Mode
NONE
EVEN
ODD
Description
Parity bits are not used
Even parity are used. Parity bits are automatically generated and checked by hardware.
Odd parity is used. Parity bits are automatically generated and checked by hardware.
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
DATABITS
0x5
RW
Data-Bit Mode
This register sets the number of data bits in a USART frame.
Value
1
2
3
4
5
6
7
8
9
10
11
12
13
Mode
FOUR
FIVE
SIX
SEVEN
EIGHT
NINE
TEN
ELEVEN
TWELVE
THIRTEEN
FOURTEEN
FIFTEEN
SIXTEEN
Description
Each frame contains 4 data bits
Each frame contains 5 data bits
Each frame contains 6 data bits
Each frame contains 7 data bits
Each frame contains 8 data bits
Each frame contains 9 data bits
Each frame contains 10 data bits
Each frame contains 11 data bits
Each frame contains 12 data bits
Each frame contains 13 data bits
Each frame contains 14 data bits
Each frame contains 15 data bits
Each frame contains 16 data bits
17.5.3 USARTn_TRIGCTRL - USART Trigger Control register
Offset
0x008
Reset
Access
Bit Position
Name
Bit
Name
Reset
Access Description
31:7
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
6
AUTOTXTEN
0
RW
AUTOTX Trigger Enable
When set, AUTOTX is enabled as long as the PRS channel selected by TSEL has a high value.
5
TXTEN
0
RW
Transmit Trigger Enable
When set, the PRS channel selected by TSEL sets TXEN, enabling the transmitter on positive trigger edges.
4
RXTEN
0
RW
Receive Trigger Enable
When set, the PRS channel selected by TSEL sets RXEN, enabling the receiver on positive trigger edges.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
475
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