EFM32WG Datasheet, PDF (68/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

...the world's most energy friendly microcontrollers
The controller does not support a dst_size value that is different to the src_size value. If it detects a
mismatch in these values, it uses the src_size value for source and destination and when it next updates
the n_minus_1 field, it also sets the dst_size field to the same as the src_size field.
After the controller completes the N transfers it sets the cycle_ctrl field to b000, to indicate that the
channel_cfg data is invalid. This prevents it from repeating the same DMA transfer.
8.4.3.4 Address calculation
To calculate the source address of a DMA transfer, the controller performs a left shift operation on the
n_minus_1 value by a shift amount that src_inc specifies, and then subtracts the resulting value from the
source data end pointer. Similarly, to calculate the destination address of a DMA transfer, it performs a
left shift operation on the n_minus_1 value by a shift amount that dst_inc specifies, and then subtracts
the resulting value from the destination end pointer.
Depending on the value of src_inc and dst_inc, the source address and destination address can be
calculated using the equations:
src_inc = b00 and dst_inc = b00
src_inc = b01 and dst_inc = b01
src_inc = b10 and dst_inc = b10
src_inc = b11 and dst_inc = b11
• source address = src_data_end_ptr - n_minus_1
• destination address = dst_data_end_ptr - n_minus_1.
• source address = src_data_end_ptr - (n_minus_1 << 1)
• destination address = dst_data_end_ptr - (n_minus_1 << 1).
• source address = src_data_end_ptr - (n_minus_1 << 2)
• destination address = dst_data_end_ptr - (n_minus_1 << 2).
• source address = src_data_end_ptr
• destination address = dst_data_end_ptr.
Table 8.10 (p. 68) lists the destination addresses for a DMA cycle of six words.
Table 8.10. DMA cycle of six words using a word increment
Initial values of channel_cfg, prior to the DMA cycle
src_size = b10, dst_inc = b10, n_minus_1 = b101, cycle_ctrl = 1
End Pointer
Count Difference ¹
Address
0x2AC
5
0x14
0x298
0x2AC
4
0x10
0x29C
DMA transfers
0x2AC
0x2AC
3
0xC
2
0x8
0x2A0
0x2A4
0x2AC
1
0x4
0x2A8
0x2AC
0
0x0
0x2AC
Final values of channel_cfg, after the DMA cycle
src_size = b10, dst_inc = b10, n_minus_1 = 0, cycle_ctrl = 0
1_{This value is the result of count being shifted left by the value of dst_inc.}
Table 8.11 (p. 68) lists the destination addresses for a DMA transfer of 12 bytes using a halfword
increment.
Table 8.11. DMA cycle of 12 bytes using a halfword increment
Initial values of channel_cfg, prior to the DMA cycle
src_size = b00, dst_inc = b01, n_minus_1 = b1011, cycle_ctrl = 1, R_power = b11
End Pointer
Count Difference ¹
Address
0x5E7
11
0x16
0x5D1
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
68
www.energymicro.com