EFM32WG Datasheet, PDF (246/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

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15.4.1 Overview: Programming the Core
Each significant programming feature of the core is discussed in a separate section.
This chapter uses abbreviations for register names and their fields. For detailed information on registers,
see Section 15.6 (p. 349) .
The application must perform a core initialization sequence. If the cable is connected during power-up,
the Current Mode of Operation bit in the Core Interrupt register (USB_GINTSTS.CURMOD) reflects the
mode. The core enters Host mode when an “A” plug is connected, or Device mode when a “B” plug
is connected.
This section explains the initialization of the core after power-on. The application must follow the
initialization sequence irrespective of Host or Device mode operation. All core global registers are
initialized according to the core’s configuration.
1. Program the following fields in the Global AHB Configuration (USB_GAHBCFG) register.
• DMA Mode bit
• AHB Burst Length field
• Global Interrupt Mask bit = 1
• Non-periodic TxFIFO Empty Level (can be enabled only when the core is operating in Slave mode
as a host.)
• Periodic TxFIFO Empty Level (can be enabled only when the core is operating in Slave mode)
2. Program the following field in the Global Interrupt Mask (USB_GINTMSK) register:
• USB_GINTMSK.RXFLVLMSK = 0
3. Program the following fields in USB_GUSBCFG register.
• HNP Capable bit
• SRP Capable bit
• External HS PHY or Internal FS Serial PHY Selection bit
• Time-Out Calibration field
• USB Turnaround Time field
4. The software must unmask the following bits in the USB_GINTMSK register.
• OTG Interrupt Mask
• Mode Mismatch Interrupt Mask
5. The software can read the USB_GINTSTS.CURMOD bit to determine whether the core is operating
in Host or Device mode. The software the follows either the Section 15.4.1.1 (p. 246) or Device
Initialization (p. 247) sequence.
Note
The core is designed to be interrupt-driven. Polling interrupt mechanism is not
recommended: this may result in undefined resolutions.
Note
In device mode, just after Power On Reset or a Soft Reset, the USB_GINTSTS.SOF bit is
set to 1 for debug purposes. This status must be cleared and can be ignored.
15.4.1.1 Host Initialization
To initialize the core as host, the application must perform the following steps.
1. Program USB_GINTMSK.PRTINT to unmask.
2. Program the USB_HCFG register to select full-speed host.
3. Program the USB_HPRT.PRTPWR bit to 1. This drives VBUS on the USB.
4. Wait for the USB_HPRT.PRTCONNDET interrupt. This indicates that a device is connect to the port.
5. Program the USB_HPRT.PRTRST bit to 1. This starts the reset process.
6. Wait at least 10 ms for the reset process to complete.
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
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