EFM32WG Datasheet, PDF (691/834 Pages) List of Unclassifed Manufacturers – The EFM32WG Wonder Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitive applications.

28.4 Register Map
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The offset register address is relative to the registers base address.
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030
0x034
0x03C
Name
ADCn_CTRL
ADCn_CMD
ADCn_STATUS
ADCn_SINGLECTRL
ADCn_SCANCTRL
ADCn_IEN
ADCn_IF
ADCn_IFS
ADCn_IFC
ADCn_SINGLEDATA
ADCn_SCANDATA
ADCn_SINGLEDATAP
ADCn_SCANDATAP
ADCn_CAL
ADCn_BIASPROG
Type
RW
W1
R
RW
RW
RW
R
W1
W1
R
R
R
R
RW
RW
Description
Control Register
Command Register
Status Register
Single Sample Control Register
Scan Control Register
Interrupt Enable Register
Interrupt Flag Register
Interrupt Flag Set Register
Interrupt Flag Clear Register
Single Conversion Result Data
Scan Conversion Result Data
Single Conversion Result Data Peek Register
Scan Sequence Result Data Peek Register
Calibration Register
Bias Programming Register
28.5 Register Description
28.5.1 ADCn_CTRL - Control Register
Offset
0x000
Reset
Access
Bit Position
Name
Bit
31:28
27:24
Name
Reset
Access Description
Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
OVSRSEL
0x0
RW
Oversample Rate Select
Select oversampling rate. Oversampling must be enabled for each mode for this setting to take effect.
Value
0
1
2
3
4
5
6
7
8
Mode
X2
X4
X8
X16
X32
X64
X128
X256
X512
Description
2 samples for each conversion result
4 samples for each conversion result
8 samples for each conversion result
16 samples for each conversion result
32 samples for each conversion result
64 samples for each conversion result
128 samples for each conversion result
256 samples for each conversion result
512 samples for each conversion result
2013-05-08 - Wonder Gecko Family - d0233_Rev0.50
691
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